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SCB_DisableDCache: Always use __ALIGNED attribute for struct locals when using gcc/clang - #311

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JonatanAntoni merged 3 commits into
ARM-software:mainfrom
rtborg:fix-disabledcache-always-align
Sep 1, 2026
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SCB_DisableDCache: Always use __ALIGNED attribute for struct locals when using gcc/clang#311
JonatanAntoni merged 3 commits into
ARM-software:mainfrom
rtborg:fix-disabledcache-always-align

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@rtborg

@rtborg rtborg commented Aug 20, 2026

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Struct locals was only aligned to the D-cache line size when __OPTIMIZE__ was not defined. This led to intermittent failures (endless loop) of MIMXRT1166.
This removes the !defined(__OPTIMIZE__) condition so the struct is always aligned when building with gcc or clang, for every optimization level.

Related to #286

@fatiki

fatiki commented Aug 27, 2026

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Maybe @JonatanAntoni you could have a look here, since you also reviewed #288.

@jkrech
jkrech requested a review from JonatanAntoni August 31, 2026 06:58
@jkrech
jkrech requested a review from RobertRostohar August 31, 2026 11:37
Comment thread CMSIS/Core/Include/m-profile/armv7m_cachel1.h Outdated

@minyuan-xue minyuan-xue left a comment

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I also encountered this problem when using -Og. This solution is necessary, but the parentheses here are not matched. Hope this PR can be merged soon.

@github-actions

github-actions Bot commented Sep 1, 2026

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Test Results

   256 files   -    388     256 suites   - 388   0s ⏱️ - 11m 55s
    56 tests +     7      54 ✅ +   10      2 💤  -     3  0 ❌ ±0 
13 860 runs   - 17 696  11 476 ✅  - 8 680  2 384 💤  - 9 016  0 ❌ ±0 

Results for commit e01645a. ± Comparison against base commit 0be833b.

This pull request removes 49 and adds 56 tests. Note that renamed tests count towards both.
CMSIS-Core.src ‑ apsr.c
CMSIS-Core.src ‑ basepri.c
CMSIS-Core.src ‑ bkpt.c
CMSIS-Core.src ‑ clrex.c
CMSIS-Core.src ‑ clz.c
CMSIS-Core.src ‑ control.c
CMSIS-Core.src ‑ cp15.c
CMSIS-Core.src ‑ cpsr.c
CMSIS-Core.src ‑ dmb.c
CMSIS-Core.src ‑ dsb.c
…
TC_CML1Cache_CleanDCacheByAddrWhileDisabled
TC_CML1Cache_EnDisableDCache
TC_CML1Cache_EnDisableICache
TC_CoreFunc_APSR
TC_CoreFunc_BASEPRI
TC_CoreFunc_Control
TC_CoreFunc_EnDisIRQ
TC_CoreFunc_EncDecIRQPrio
TC_CoreFunc_FAULTMASK
TC_CoreFunc_FPSCR
…
This pull request removes 5 skipped tests and adds 2 skipped tests. Note that renamed tests count towards both.
CMSIS-Core.src ‑ lda.c
CMSIS-Core.src ‑ ldaex.c
CMSIS-Core.src ‑ stl.c
CMSIS-Core.src ‑ stlex.c
CMSIS-Core.src ‑ systick.c
TC_CoreInstr_WFE
TC_CoreInstr_WFI

♻️ This comment has been updated with latest results.

Co-authored-by:  minyuan_xue <minyuan_xue@realsil.com.cn>
@JonatanAntoni
JonatanAntoni merged commit 8827df2 into ARM-software:main Sep 1, 2026
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5 participants