nios-ii

FPGA-based real-time guitar effects processor for the Terasic DE1-SoC, implementing distortion, overdrive, tremolo, echo and reverb in VHDL and Nios II/C.

Matrix Multiplication in Hardware

ECE385 Final Project - Raiden Shooter Game - at ZJU-UIUC Institute; w/ 16-bit VGA, Sound and Ethernet

ECE 385 Final Project -- Ethernet on MAX10 DE10-Lite FPGA and Nios II soft processor

A digital sound synthesizer on FPGA written in VHDL, C, Python and NodeJS (Terasic DE1-SoC)

Nios II Vscode Extension

Ziyuan Chen, ECE385 @ UIUC 23SP

Various VGA video output projects on the NIOS II processor

Automatically create a NIOS II Eclipse Project with the latest FreeRTOS Version, the Intel hwlib and more...

Gravitational simulation of the N-body problem using FPGA hardware acceleration

FPGA and RTOS based video display driver for an LED matrix, with HTTP control over WiFi

VHDL hardware accelerators for Cyclone II FPGA with MCU apps in C for Nios II CPU

An example for NIOS II processor to toggle a Led with a Button

Coursework for ELEC60011: Digital System Design - a Quartus project containing a NIOS II soft-core and custom instruction hardware accelerators for the target function

KelvinThomasYB17/VGA-Radar-sensor-using-VHDL-and-NIOS II

Programming labs in Nios II architecture.

Experimental MCU (Microcontroller Unit) RadonMCU is an FPGA-based soft-core microcontroller platform built around Intel Nios II. The repository includes both hardware design (Quartus + Platform Designer) and software examples (Nios II SBT/Eclipse) used to validate the system on real hardware.

Assignments for the SoC and embedded linux elective course